Binning operations for Charge-Coupled Devices (CCD) are well-known in the art. Charges from adjacent pixels in a column are typically summed in a horizontal register in a CCD sensor. Charges from adjacent columns are then summed at an output node. The resulting operation produces a binned signal having a reduced resolution, but improved signal-to-noise ratio characteristics. Since the binning takes place in the charge domain, the summation of signals is relatively noiseless.
Complimentary metal oxide semiconductor (CMOS) active pixel sensors (APS) have gained increased usage over recent years. CMOS image sensors are generally known in the art and are discussed, for example, in Nixon et al., “256×256 CMOS Active Pixel Sensor Camera-on-a-Chip,” IEEE Journal of Solid-State Circuits, Vol. 31(12), pp. 2046-2050 (1996); and Mendis et al., “CMOS Active Pixel Image Sensors,” IEEE Transactions on Electron Devices, Vol. 41(3), pp. 452-453 (1994). See also U.S. Pat. Nos. 6,177,333 and 6,204,524, which are assigned to Micron Technology, Inc., and describe operation of conventional CMOS image sensors, the contents of which are incorporated herein by reference.
Although typically used in CCD sensors, binning techniques have been developed for CMOS active pixel sensors. In one known technique summation for frame-rate transfers are implemented through the column charge integration amplifier (CIA) in a pixel sensor. This technique is discussed in an article written by Zhmin Zhou, et al., titled “Frame-Transfer CMOS Active Pixel Sensor with Pixel Binning”, IEEE Transactions On Electron Devices, vol. 44, 10, Oct. 1997, pp. 1764-1768 (“Zhou”). According to Zhou, charge summation is integrated in a column CIA for the vertical direction, and in a global CIA in the horizontal direction. Signals from selected rows in a kernel or element of an array (i.e., a selected resolution) are integrated by column integrators one row at a time. After the row summation is completed, consecutive columns are integrated after each reset of the global integrator.
Such configurations, however, tend to require greater operating times and introduce excessive kTC noise in the imaging device. What is needed is a binning operation that functions within the pixel array to minimize operation time and/or noise.